9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355B/CY7C1357B is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355B/CY7C1357B is equipped with the advanced No B

文件：560.17 Kbytes 页数：33 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355B/CY7C1357B is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355B/CY7C1357B is equipped with the advanced No B

文件：560.17 Kbytes 页数：33 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355B/CY7C1357B is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355B/CY7C1357B is equipped with the advanced No B

文件：560.17 Kbytes 页数：33 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355B/CY7C1357B is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355B/CY7C1357B is equipped with the advanced No B

文件：560.17 Kbytes 页数：33 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司