256K x 36/512K x 18 Synchronous Pipelined Burst SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte

文件：558.86 Kbytes 页数：28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 36/512K x 18 Synchronous Pipelined Burst SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte

文件：558.86 Kbytes 页数：28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 36/512K x 18 Synchronous Pipelined Burst SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte

文件：558.86 Kbytes 页数：28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 36/512K x 18 Synchronous Pipelined Burst SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1360A and CY7C1362A SRAMs inte

文件：558.86 Kbytes 页数：28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司