首页 >CY7C1350FSERIES>规格书列表
| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
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128Kx36PipelinedSRAMwithNoBLArchitecture FunctionalDescription TheCY7C1350Bisa3.3V,128Kby36synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1350BisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequiredt | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mb(128Kx36)PipelinedSRAMwithNoblArchitecture FunctionalDescription[1] TheCY7C1350Fisa3.3V,128Kx36synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1350FisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit(128Kx36)PipelinedSRAMwithNoBL??Architecture | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress | ||
4-Mbit(128Kx36)PipelinedSRAMwithNoBLArchitecture FunctionalDescription[1] TheCY7C1350Gisa3.3V,128Kx36synchronous-pipelinedBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1350GisequippedwiththeadvancedNoBusLatency™(NoBL™)logicrequired | CypressCypressSemiconductor 赛普拉斯赛普拉斯半导体公司 | Cypress |
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