128K x 36 Synchronous-Pipelined Cache SRAM

Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA

文件：389.59 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 36 Synchronous-Pipelined Cache SRAM

Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA

文件：389.59 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 36 Synchronous-Pipelined Cache SRAM

Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA

文件：389.59 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 36 Synchronous-Pipelined Cache SRAM

Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA

文件：389.59 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 36 Synchronous-Pipelined Cache SRAM

Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA

文件：389.59 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 36 Synchronous-Pipelined Cache SRAM

Functional Description This Cypress Synchronous Burst SRAM employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors. The CY7C1347D SRAM integrate 131,072 x 36 SRA

文件：389.59 Kbytes 页数：21 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司