CD4508BPW.A

Marking：CM508B；Package：TSSOP；CMOS Dual 4-Bit Latch

Features: ®Twoindependent4-bitlatches ®Individualmasterresetforeach4-bitlatch ®3.stateoutputswithhigh-impedancestateforbus lineapplications =Medium-speedoperation:tp=tp4=70ns {typ.)atVpp=10VandC_=50pF ®100%testedforquiescentcurrentat20V ®5-V

CD4527BPW

Marking：CM527B；Package：TSSOP；CMOS BCD Rate Multiplier

Features: *Cascadableinmultiplesof4-bits *Setto“9”inputand,‘8detectoutput *100testforquiescentcurrentat20V *5.V,10-V,and15-Vparametricratings *Standardized,symmetricaloutput characteristics *Maximuminputeurrentof1uAat18Vover fullpackage-temperature

CD4527BPWR

Marking：CM527B；Package：TSSOP；CMOS BCD Rate Multiplier

Features: *Cascadableinmultiplesof4-bits *Setto“9”inputand,‘8detectoutput *100testforquiescentcurrentat20V *5.V,10-V,and15-Vparametricratings *Standardized,symmetricaloutput characteristics *Maximuminputeurrentof1uAat18Vover fullpackage-temperature