丝印：CM572UB；Package：TSSOP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI2

德州仪器

丝印：CM572UB；Package：TSSOP；CMOS Hex Gate

Features: Pin 7 NOR input positioned adjacent to Vss for easy use of gate as an inverter Pin 15 NAND input positioned adjacent to Voo for easy use of gate as an inverter Standard symmetrical output characteristics 100% tested for quiescent current at 20 V Maximum input current of 1

文件：896.17 Kbytes 页数：20 Pages

TI2

德州仪器