丝印：CM035B；Package：TSSOP；CMOS 4-Stage Parallel In/Parallel Out Shift Register

Features: ® 4-Stage clocked shift operation # Synchronous parallel entry on all 4 stages a JK inputs on first stage ® Asynchronous True/Complement control on all outputs ® Static flip-flop operation; Master-slave configuration ® Buffered inputs and outputs ® High speed — 12

文件：710.52 Kbytes 页数：17 Pages

TI

德州仪器

丝印：CM035B；Package：TSSOP；CMOS 4-Stage Parallel In/Parallel Out Shift Register

Features: ® 4-Stage clocked shift operation # Synchronous parallel entry on all 4 stages a JK inputs on first stage ® Asynchronous True/Complement control on all outputs ® Static flip-flop operation; Master-slave configuration ® Buffered inputs and outputs ® High speed — 12

文件：710.52 Kbytes 页数：17 Pages

TI

德州仪器