丝印：CL857；Package：QSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

文件：239.16 Kbytes 页数：9 Pages

TI

德州仪器

丝印：CL857；Package：TVSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

文件：239.16 Kbytes 页数：9 Pages

TI

德州仪器

丝印：CL857；Package：TSSOP；LOW-VOLTAGE 10-BIT FET BUS SWITCH WITH INTERNAL PULLDOWN RESISTORS

Enable Signal Is SSTL_2 Compatible Flow-Through Architecture Optimizes PCB Layout Designed for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM Applications Switch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAM Internal 10-kΩ Pulldown Resistors to Ground on B Por

文件：239.16 Kbytes 页数：9 Pages

TI

德州仪器