丝印：CKV05；Package：TSSOP；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1• Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications • Spread Spectrum Clock Compatible • Operating Frequency: 24 MHz to 200 MHz • Low Jitter (Cycle-to-Cycle):

文件：862.54 Kbytes 页数：25 Pages

TI

德州仪器

丝印：CKV25081；Package：SOIC；CDCVF25081 3.3-V Phased-Lock Loop Clock Driver

1 Features • Phase-locked loop based, zero-delay buffer – 1 clock input to 2 banks of 4 outputs – No external RC network required • Supply voltage: 3 V to 3.6 V • Operating frequency: 8 MHz to 200 MHz • Low additive jitter (cycle-cycle): ±100 ps for 66 MHz to 200 MHz • Power-down mode avai

文件：1.18376 Mbytes 页数：26 Pages

TI

德州仪器

丝印：CKV25081；Package：SOIC；CDCVF25081 3.3-V Phased-Lock Loop Clock Driver

1 Features • Phase-locked loop based, zero-delay buffer – 1 clock input to 2 banks of 4 outputs – No external RC network required • Supply voltage: 3 V to 3.6 V • Operating frequency: 8 MHz to 200 MHz • Low additive jitter (cycle-cycle): ±100 ps for 66 MHz to 200 MHz • Power-down mode avai

文件：1.18376 Mbytes 页数：26 Pages

TI

德州仪器

丝印：CKV310；Package：TSSOP(PW)；2.5-V TO 3.3-V HIGH-PERFORMANCE CLOCK BUFFER

1FEATURES · High-Performance 1:10 Clock Driver · Pin-to-Pin Skew

文件：385.78 Kbytes 页数：17 Pages

TI

德州仪器