丝印：D1204；Package：VQFN；CDCLVD1204 2:4 Low Additive Jitter LVDS Buffer

1 Features 1• 2:4 Differential Buffer • Low Additive Jitter:

文件：862.08 Kbytes 页数：26 Pages

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丝印：D1204；Package：VQFN(RGT)；CDCLVD1204 2:4 Low Additive Jitter LVDS Buffer

1 Features 1• 2:4 Differential Buffer • Low Additive Jitter:

文件：866.49 Kbytes 页数：27 Pages

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德州仪器

Two LVPECL Output, High-Performance Clock Buffer

文件：753.48 Kbytes 页数：22 Pages

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德州仪器

CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：863.58 Kbytes 页数：30 Pages

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德州仪器

CDCLVP1204 Four LVPECL Output, High-Performance Clock Buffer

1 Features 1• 2:4 Differential Buffer • Selectable Clock Inputs Through Control Terminal • Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL • Four LVPECL Outputs • Maximum Clock Frequency: 2 GHz • Maximum Core Current Consumption: 45 mA • Very Low Additive Jitter:

文件：904.4 Kbytes 页数：33 Pages

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德州仪器