CD74HCT356中文资料具有三态输出的高速 CMOS 逻辑 8 输入多路复用器/寄存器数据手册TI规格书

描述 Description

The CD74HCT356 consists of data selectors/multiplexers that select one of eight sources. The data select bits (S0, S1, and S2) are stored in transparent latches that are enabled by a low latch enable input (LE\\).
The data is stored in edge-triggered flip-flops that are triggered by a low-to-high clock transition.
In both types the 3-state outputs are controlled by three output-enable inputs (OE1\\, OE2\\, and OE3).

特性 Features

• Edge-Triggered Data Flip-Flops
• Buffered Inputs
• Bus Line Driving Capability
• Fanout (Over Temperature Range)
• Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Balanced Propagation Delay and Transition Times
• 4.5V to 5.5V Operation
• CMOS Input Compatibility, Il 1µA at VOL, VOH