Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

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德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件：279.59 Kbytes 页数：12 Pages

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德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件：58.14 Kbytes 页数：8 Pages

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德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件：347.95 Kbytes 页数：16 Pages

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德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件：454.62 Kbytes 页数：15 Pages

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德州仪器

丝印：CD74HC109E；Package：PDIP；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器

丝印：CD74HC109E；Package：PDIP；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器

具有设置和复位端的高速 CMOS 逻辑双路正边沿触发式 J-K 触发器

The ’HC109 and ’HCT109 are dual J-K\\ flip-flops with set and reset. The flip-flop changes state with the positive transition of Clock (1CP and 2CP).\n\n The flip-flop is set and reset by active-low S\\ and R\\, respectively. A low on both the set and reset inputs simultaneously will force both Q an • Asynchronous Set and Reset\n• Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, A = 25°C\n• Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads\n• Wide Operating Temperature Range . . . -55°C to 125°C\n• Significant Power Reduction Compared to LSTTL Logic ICs\n• 2V to 6V Operation\n• HCT Type;

TI

德州仪器

丝印：HC109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器

丝印：HC109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器