CD54HCT112中文资料具有设置与复位端的高速 CMOS 逻辑双路负边沿触发式 J-K 触发器数据手册TI规格书

描述 Description

The ’HC112 and ’HCT112 utilize silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.

These flip-flops have independent J, K, Set, Reset, and Clock inputs and Q and Q\\ outputs. They change state on the negative-going transition of the clock pulse. Set and Reset are accomplished asynchronously by low-level inputs.

The HCT logic family is functionally as well as pin-compatible with the standard LS logic family.

特性 Features

• Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
• Complementary Outputs
• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C
• Standard Outputs . . . . . 10 LSTTL Loads
• Wide Operating Temperature Range . . . –55°C to 125°C
• Significant Power Reduction Compared to LSTTL Logic ICs
• 2V to 6V Operation
• HCT Types
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor