CD54HC597中文资料具有输入存储的高速 CMOS 逻辑 8 位移位寄存器数据手册TI规格书

描述 Description

The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A \"low\" on the parallel load input (PL\\) shifts parallel stored data asynchronously into the shift register. A \"low\" master input (MR\\) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\\ is high.

特性 Features

• Buffered Inputs
• Fanout (Over Temperature Range)
• Bus Driver Outputs...15 LSTTL Loads
• Balanced Propagation Delay and Transition Times
• HC Types
• High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Data sheet acquired from Harris Semiconductor