首页 >CD54HC112>规格书列表

型号下载 订购功能描述制造商 上传企业LOGO

CD54HC112

CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger

1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output

文件:1.3793 Mbytes 页数:29 Pages

TI

德州仪器

CD54HC112

Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger

文件:757.59 Kbytes 页数:20 Pages

TI

德州仪器

CD54HC112

Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger

文件:346.89 Kbytes 页数:13 Pages

TI

德州仪器

CD54HC112

Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger

文件:643.79 Kbytes 页数:18 Pages

TI

德州仪器

CD54HC112

具有设置与复位端的高速 CMOS 逻辑双路负边沿触发式 J-K 触发器

The ’HC112 and ’HCT112 utilize silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.\n\n These flip-flops have independent J, K, Set, Reset, a • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times\n• Complementary Outputs\n• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C\n• Standard Outputs . . . . . 10 LSTTL Loads\n• Wide Operating Temperature Range . . . –55°C to 125°C\n• Significant Pow;

TI

德州仪器

CD54HC112_V01

CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger

1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output

文件:1.3793 Mbytes 页数:29 Pages

TI

德州仪器

CD54HC112F3A

丝印:8408801EA;Package:CDIP;CDx4HC112, CDx4HCT112 Dual J-K Flip-Flop with Set and Reset with Negative-Edge Trigger

1 Features • Hysteresis on clock inputs for improved noise immunity and increased input rise and fall times • Asynchronous set and reset • Complementary outputs • Buffered inputs • Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25℃ • Fanout (over temperature range) – Standard output

文件:1.3793 Mbytes 页数:29 Pages

TI

德州仪器

CD54HC112_08

Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger

文件:643.79 Kbytes 页数:18 Pages

TI

德州仪器

CD54HC112_15

Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger

文件:757.59 Kbytes 页数:20 Pages

TI

德州仪器

CD54HC112F3A

Dual J-K Flip-Flop with Set and Reset Negative-Edge Trigger

文件:643.79 Kbytes 页数:18 Pages

TI

德州仪器

技术参数

  • Technology Family:

    HC

  • Supply voltage (Min) (V):

    2

  • Supply voltage (Max) (V):

    6

  • Input type:

    LVTTL/CMOS

  • Output type:

    Push-Pull

  • Clock Frequency (MHz):

    20

  • ICC (Max) (uA):

    80

  • IOL (Max) (mA):

    -6

  • IOH (Max) (mA):

    6

  • Features:

    Balanced outputs

供应商型号品牌批号封装库存备注价格
TI德州仪器
22+
24000
原装正品现货,实单可谈,量大价优
询价
TI
23+
DIP陶瓷
5000
原装正品,假一罚十
询价
HARRIS
97+
CDIP-16
47
原装现货海量库存欢迎咨询
询价
TI
三年内
1983
只做原装正品
询价
TI(德州)
23+
CDIP
50000
全新原装正品现货,支持订货
询价
HAR
25+
QFP
3200
全新原装、诚信经营、公司现货销售!
询价
TI
25+
8880
原装认准芯泽盛世!
询价
H
23+
CDIP
10000
原厂授权一级代理,专业海外优势订货,价格优势、品种
询价
TI/德州仪器
22+
DIP16
12245
现货,原厂原装假一罚十!
询价
TI/德州仪器
23+
NA
9920
原装正品,支持实单
询价
更多CD54HC112供应商 更新时间2025-10-6 15:05:00