CD54ACT139F3A.A

Marking：CD54ACT139F3A；Package：CDIP；DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage BufferedInputs IncorporateTwoEnableInputstoSimplify Cascadingand/orDataReception SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagation

CD54ACT153F3A

Marking：CD54ACT153F3A；Package：CDIP；DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPower Consumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcess andCircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883

CD54ACT153F3A.A

Marking：CD54ACT153F3A；Package：CDIP；DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

InputsAreTTL-VoltageCompatible SpeedofBipolarF,AS,andS,With SignificantlyReducedPower Consumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSProcess andCircuitDesign Exceeds2-kVESDProtectionPer MIL-STD-883

CD54ACT161F3A

Marking：CD54ACT161F3A；Package：CDIP；4-BIT SYNCHRONOUS BINARY COUNTERS

InputsAreTTL-VoltageCompatible InternalLook-AheadforFastCounting CarryOutputforn-BitCascading SynchronousCounting SynchronouslyProgrammable SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionper MIL-STD-883,Method3015 description/orderingin

CD54ACT161F3A.A

Marking：CD54ACT161F3A；Package：CDIP；4-BIT SYNCHRONOUS BINARY COUNTERS

InputsAreTTL-VoltageCompatible InternalLook-AheadforFastCounting CarryOutputforn-BitCascading SynchronousCounting SynchronouslyProgrammable SCR-Latchup-ResistantCMOSProcessand CircuitDesign Exceeds2-kVESDProtectionper MIL-STD-883,Method3015 description/orderingin

CD54ACT163F3A

Marking：CD54ACT163F3A；Package：CDIP；4-BIT SYNCHRONOUS BINARY COUNTERS

InputsAreTTL-VoltageCompatible InternalLook-AheadforFastCounting CarryOutputforn-BitCascading SynchronousCounting SynchronouslyProgrammable description/orderinginformation The’ACT163devicesare4-bitbinarycounters. Thesesynchronous,presettablecountersfeature aninte

CD54ACT163F3A.A

Marking：CD54ACT163F3A；Package：CDIP；4-BIT SYNCHRONOUS BINARY COUNTERS

InputsAreTTL-VoltageCompatible InternalLook-AheadforFastCounting CarryOutputforn-BitCascading SynchronousCounting SynchronouslyProgrammable description/orderinginformation The’ACT163devicesare4-bitbinarycounters. Thesesynchronous,presettablecountersfeature aninte

CD54ACT174F3A

Marking：CD54ACT174F3A；Package：CDIP；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1Features •InputsareTTL-voltagecompatible •Containsixflip-flopswithsingle-railoutputs •Bufferedinputs •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Balancedpropagationdelays •±24mAoutputdrivecurrent –Fanoutto15Fdevices •SCR-latchu

CD54ACT174F3A

Marking：CD54ACT174F3A；Package：CDIP；CDx4ACT174 Hex D-Type Flip-Flops with Clear

1Features •InputsareTTL-voltagecompatible •Containsixflip-flopswithsingle-railoutputs •Bufferedinputs •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Balancedpropagationdelays •±24mAoutputdrivecurrent –Fanoutto15Fdevices •SCR-latchu

CD54ACT280F3A

Marking：CD54ACT280F3A；Package：CDIP；9-Bit Odd/Even Parity Generator/Checker

Features •BufferedInputs •TypicalPropagationDelay -10nsatVCC=5V,TA=25oC,CL=50pF •Exceeds2kVESDProtectionperMIL-STD-883, Method3015 •SCR-Latchup-ResistantCMOSProcessandCircuit Design •SpeedofBipolarFAST™/AS/SwithSignificantly ReducedPowerConsumption •B