SN74LVC1GU04DCKR

Marking：CD5；Package：SC70；Single Inverter Gate

SN74LVC1GU04DCKT

Marking：CD5；Package：SC70；Single Inverter Gate

CD54AC05F3A

Marking：CD54AC05F3A；Package：CDIP；CDx4AC05 Hex Inverters With Open-Drain Outputs

1Features •ACtypesfeature1.5Vto5.5Voperationand balancednoiseimmunityat30%ofthesupply voltage •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Fanoutto15Fdevices •SCR-latchup-resistantCMOSprocessandcircuit design •Exceeds2kVES

CD54AC112F3A

Marking：CD54AC112F3A；Package：CDIP；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro

CD54AC112F3A.A

Marking：CD54AC112F3A；Package：CDIP；DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro

CD54AC138F3A

Marking：CD54AC138F3A；Package：CDIP；CDx4AC138 3-Line to 8-Line Decoders/Demultiplexers

1Features •ACtypesfeature1.5Vto5.5Voperationand balancednoiseimmunityat30ofthesupply voltage •SpeedofbipolarF,AS,andS,withsignificantly reducedpowerconsumption •Designedspecificallyforhigh-speedmemory decodersanddata-transmissionsystems •Incorporatethre

CD54AC139F3A

Marking：CD54AC139F3A；Package：CDIP；DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage BufferedInputs IncorporateTwoEnableInputstoSimplify Cascadingand/orDataReception SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagation

CD54AC139F3A.A

Marking：CD54AC139F3A；Package：CDIP；DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage BufferedInputs IncorporateTwoEnableInputstoSimplify Cascadingand/orDataReception SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagation

CD54AC157F3A

Marking：CD54AC157F3A；Package：CDIP；QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro

CD54AC157F3A.A

Marking：CD54AC157F3A；Package：CDIP；QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

ACTypesFeature1.5-Vto5.5-VOperation andBalancedNoiseImmunityat30%ofthe SupplyVoltage SpeedofBipolarF,AS,andS,With SignificantlyReducedPowerConsumption BalancedPropagationDelays ±24-mAOutputDriveCurrent –Fanoutto15FDevices SCR-Latchup-ResistantCMOSPro