CMOS Dual Up Counters

Description CD4518BMS Dual BCD Up Counter and CD4520BMS Dual Binary Up Counter each consist of two identical, internally synchronous 4-stage counters. The counter stages are D-type flip-flops having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or negative-g

文件：112.68 Kbytes 页数：10 Pages

Intersil

CMOS DUAL UP-COUNTERS

文件：248.7 Kbytes 页数：13 Pages

TI

德州仪器

丝印：CD4518BE；Package：PDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BE；Package：PDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BE；Package：PDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BF；Package：CDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BF；Package：CDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BF3A；Package：CDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BF3A；Package：CDIP；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器

丝印：CD4518BM；Package：SOIC；CMOS Dual Up-Counters

Features: Medium-speed operation — 6-MHz typical clock frequency st 10 V, = Positive- or negative-edge triggering m Synchronous internal carry propagation . 100% tested for quiescent current at 20 V & Maximum input current of 1 uA at 18 V ‘over full package-temperature range; 100 nAat

文件：986.41 Kbytes 页数：22 Pages

TI

德州仪器