CMOS DUAL 2-WIDE 2-INPUT AND-OR-INVERT GATE

文件：527 Kbytes 页数：11 Pages

TI

德州仪器

Cmos Dual 2-Wide 2-Input AND-OR-INVERT Gate

文件：892.47 Kbytes 页数：15 Pages

TI

德州仪器

CMOS DUAL 2-WIDE 2-INPUT AND-OR-INVERT GATE

文件：527 Kbytes 页数：11 Pages

TI

德州仪器

CMOS 双路 2 宽度 2 输入与或非门

CD4085 contains a pair of AND-OR-INVERT gates, each consisting of two 2-input AND gates driving a 3-input NOR gate. Individual inhibit controls are provided for both A-O-I gates.\n\n The CD4085B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line p • Medium-speed operation - tPHL = 90 ns; tPLH = 125 ns (typ.) at 10 V\n• Individual inhibit controls\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25;

TI

德州仪器

CMOS 双路 2 宽度 2 输入与或非门

CD4085 contains a pair of AND-OR-INVERT gates, each consisting of two 2-input AND gates driving a 3-input NOR gate. Individual inhibit controls are provided for both A-O-I gates.\n\n The CD4085B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line p • Medium-speed operation - tPHL = 90 ns; tPLH = 125 ns (typ.) at 10 V\n• Individual inhibit controls\n• Standardized symmetrical output characteristics\n• 100% tested for quiescent current at 20 V\n• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25;

TI

德州仪器

Package：14-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 门和反相器 - 多功能，可配置 描述：IC DUAL AND-ORINV GATE 14-SOIC

TI

德州仪器

Package：14-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 - 多功能，可配置 描述：IC DUAL AND-ORINV GATE 14-SOIC

TI

德州仪器

Package：14-SOIC（0.154"，3.90mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 门和反相器 - 多功能，可配置 描述：IC DUAL AND-ORINV GATE 14-SOIC

TI

德州仪器