CD4085B中文资料CMOS 双路 2 宽度 2 输入与或非门数据手册TI规格书

描述 Description

CD4085 contains a pair of AND-OR-INVERT gates, each consisting of two 2-input AND gates driving a 3-input NOR gate. Individual inhibit controls are provided for both A-O-I gates.

The CD4085B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

特性 Features

• Medium-speed operation - tPHL = 90 ns; tPLH = 125 ns (typ.) at 10 V
• Individual inhibit controls
• Standardized symmetrical output characteristics
• 100% tested for quiescent current at 20 V
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package-temperature range):
• 1 V at VDD = 5 V
• 2 V at VDD = 10 V
• 2.5 V at VDD = 15 V

• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of 'B' Series CMOS Devices\"

简介

CD4085B属于集成电路（IC）的门反相器-多功能可配置。由TI制造生产的CD4085B门和反相器 - 多功能，可配置可配置逻辑栅极系列产品能以与标准逻辑栅极类似的方式，对单个逻辑信号执行基本逻辑运算，但并非局限于一个特定功能（例如 AND、NAND 等）。它们通常在内部使用少量逻辑门来实现，经过选择和互连后，以便通过选择操作数据所应用的输入以及任何未使用的输入在驱动后的逻辑状态，来配置所实现的整体逻辑功能。