CD4047B中文资料CMOS 低功耗单稳态/不稳定多谐振荡器数据手册TI规格书

描述 Description

CD4047B consists of a gatable astable multivibrator with logic techniques incorporated to permit positive or negative edge-triggered monostable multivibrator action with retriggering and external counting options.
Inputs include +TRIGGER, -TRIGGER, ASTABLE, ASTABLE\\, RETRIGGER, and EXTERNAL RESET.Buffered outputs are Q\\, Q and OSCILLATOR.In all modes of operation, and external capacitor must be connected between C-Timing and RC-Common terminal, and an external resistor must be connected between the R-Timing and RC-Common terminals.
Astable operation is enabled by a high level on the STABLE input or a low level on the ASTABLE\\ input, or both.The period of the square wave at the Q and Q\\ Outputs in this mode off operation is a function of the external components employed.\"True\" input pulses on the ASTABLE input or \"Complement\" pulses on the ASTABLE\\ input allow the circuit to be used as a gatable multivibrator.The OSCILLATOR output period will be half of the Q terminal output in the astable mode.However, a 50% duty cycle is not guaranteed at this output.
The CD4047B triggers in the monostable mode when a positive-going edge occurs on the +TRIGGER-input while the -TRIGGER is held low.INput pulses may be of any duration relative to the output pulse.
If retrigger capability is desired, the RETRIGGER input is pulsed.The retriggerable mode of operation is limited to positive-going edge.The CD4047B will retrigger as long as the RETRIGGER-input is high, with or without transitions (See Fig. 34).
An external countdown option can be implemented by coupling \"Q\" to an external \"N\" counter and resetting the counter with the trigger pulse.The counter output pulse is fed back to the ASTABLE\\ input and has a duration equal to N times the period of the multivibrator.
A high level on the EXTERNAL RESET input assures no output pulse during an \"ON\" power condition.This input can also be activated to terminate the output pulse at any tine.For monostable operation, whenever VDD is applied, and internal power-on reset circuit will clock the Q output low within one output period (tM).
The CD4047B-Series types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix),14-lead dual-in-line plastic packages (E suffix), 14-lead small outline packages (M, MT, M96, and NSR suffixes),and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

特性 Features

• Lower power consumption: special CMOS oscillator configuration
• True and complemented buffered outputs
• Buffered inputs
• Standardized, symmetrical output characteristics
• Meets all requirements of JEDEC Tentative Standard No. 13B, \"Standard Specifications for Description of 'B' Series CMOS Devices\"
• Output pulse width independent of trigger pulse duration
• Internal power-on reset circuit
• Fast recovery time essentially independent of pulse width
• Astable Multivibrator Features:
• 50% duty cycle
• Good astable frequency stability:    Frequency deviation:      = ±2% + 0.03%/°C @ 100 kHz      = ±0.5% +0.015%/°C @ 10 kHz (circuits \"trimmed\" to frequency VDD = 10 V ± 10%)
• Frequency multiplication
• Frequency discriminators
• Time-delay applications
Data sheet acquired from Harris Semiconductor