CD4045B中文资料CMOS 21 级计数器数据手册TI规格书

描述 Description

CD4045B is a timing circuit consisting of 21 counter stages, two output-shaping flip-flops, two inverter output drivers, and input inverters for use in a crystal oscillator. The CD4045B configuration provides 21 flip-flop counting stages, and two flip-flops for shaping the output waveform for a 3.125% duty cycle. Push-pull operation is provided by the inverter output drivers.
The first inverter is intended for use as a crystal oscillator/amplifier. However, it may be used as a normal logic inverter if desired. A crystal oscillator circuit can be made less sensitive to voltage-supply variations by the user of source resistors. In this device, the sources of the p and n transistors have been brought out to package terminals. If external resistors are not required, the sources must be shorted to their respective substrates (Sp to VDD, Sn to VSS). See Fig. 1. The first inverter in conjunction with an outboard inverter, such as 1/6 CD4069, and RX, CX, and RS can also be used to construct an RC oscillator. Thefollowing data is supplied as a guide in the selection of values for RX, RS, and CX used in Fig. 11:
RX max = 10 M and CX = 50 pF CX max = 25 µF with RS = 560 k The CD4045B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline package (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

特性 Features

• Very low operating dissipation . . . . . DD = 5 V, f = 1 MHz
• Medium speed (typ.) . . . f = 25 MHz @ VDD = 10 V
• 5-V, 10-V, and 15-V parametric ratings
• Applications
• Accurate timing from a crystal oscillator for timing applications such as wall clocks, table clocks, automobile clocks, and digital timing references in any circuit requiring accurately timed outputs at various intervals in the counting sequence.
• Driving miniature synchronous motors, stepping motors, or external bipolar transistors in push-pull fashion.

简介

CD4045B属于集成电路（IC）的计数器除法器。由TI制造生产的CD4045B计数器，除法器计数器和除法器 IC 是数字逻辑器件，可对输入发生的逻辑转换进行计数，然后使用多个并行输出重新发送累加的计数，和/或生成单个输出信号转换，从而对应用某些整数数量输入信号转换进行响应。除了简单的事件计数，它们还可用于各种频率合成应用。