Quad EXCLUSIVE-OR Gate

General Description The CD4030C EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. All inputs are protected against static discharge with diodes to VDD and VSS. Features ■ Wide supply voltage range: 3.0V

文件：45.82 Kbytes 页数：5 Pages

Fairchild

仙童半导体

CMOS Quad Exclusive-OR Gate

Description The CD4030BMS types consist of four independent Exclusive-OR gates. The CD4030BMS provides the system designer with a means for direct implementation of the Exclusive-OR function. Features • High Voltage Type (20V Rating) • Medium-Speed Operation     - tPHL, tPLH = 65ns (typ) at V

文件：59.66 Kbytes 页数：7 Pages

Intersil

CMOS QUAD EXCLUSIVE-OR GATE

文件：497.8 Kbytes 页数：11 Pages

TI

德州仪器

丝印：CD4030BE；Package：PDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4030BE；Package：PDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4030BE；Package：PDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4030BF；Package：CDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4030BF；Package：CDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4030BF3A；Package：CDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器

丝印：CD4030BF3A；Package：CDIP；CMOS Quad Exclusive-OR Gate

Features: Medium-speed operation—tpy_. tp = 65 ns (typ.) at Vpp = 10 V, C= 50 pF = 100% tested for quiescent current at 20 V Standardized, symmetrical output characteristics 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full package- temperature ran

文件：971.74 Kbytes 页数：20 Pages

TI

德州仪器