型号 | 下载 订购 | 功能描述 | 制造商 上传企业 | LOGO |
---|---|---|---|---|
CD4029BF | 丝印:CD4029BF;Package:CDIP;CMOS Presettable Up/Down Counter Features: ® Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ® Binary or d 文件:1.02221 Mbytes 页数:22 Pages | TI 德州仪器 | TI | |
丝印:CD4029BF;Package:CDIP;CMOS Presettable Up/Down Counter Features: ® Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ® Binary or d 文件:1.02221 Mbytes 页数:22 Pages | TI 德州仪器 | TI | ||
CD4029BF | 丝印:CD4029BF;Package:CDIP;CMOS Presettable Up/Down Counter Features: ® Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ® Binary or d 文件:1.02221 Mbytes 页数:22 Pages | TI 德州仪器 | TI | |
丝印:CD4029BF;Package:CDIP;CMOS Presettable Up/Down Counter Features: ® Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ® Binary or d 文件:1.02221 Mbytes 页数:22 Pages | TI 德州仪器 | TI | ||
丝印:8101602EA;Package:CDIP;CMOS Presettable Up/Down Counter Features: ® Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ® Binary or d 文件:1.02221 Mbytes 页数:22 Pages | TI 德州仪器 | TI | ||
丝印:8101602EA;Package:CDIP;CMOS Presettable Up/Down Counter Features: ® Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ® Binary or d 文件:1.02221 Mbytes 页数:22 Pages | TI 德州仪器 | TI | ||
CD4029BF | CMOS PRESETTABLE UP/DOWN COUNTER 文件:1.03602 Mbytes 页数:18 Pages | TI 德州仪器 | TI | |
CD4029BF | CMOS PRESETTABLE UP/DOWN COUNTER 文件:302.49 Kbytes 页数:7 Pages | TI 德州仪器 | TI | |
CMOS PRESETTABLE UP/DOWN COUNTER 文件:1.03602 Mbytes 页数:18 Pages | TI 德州仪器 | TI | ||
CMOS PRESETTABLE UP/DOWN COUNTER 文件:302.49 Kbytes 页数:7 Pages | TI 德州仪器 | TI |
详细参数
- 型号:
CD4029BF
- 制造商:
Texas Instruments
- 功能描述:
Counter Single 4-Bit Async Binary/Decade UP/Down 16-Pin CDIP Tube
- 功能描述:
PRESETTABLE UP/DOWN COUNTER
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
25+ |
标准封装 |
18000 |
原厂直接发货进口原装 |
询价 | ||
HAR |
24+ |
DIP |
5650 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
询价 | ||
TI |
23+ |
1000 |
全新原装正品现货,价优 |
询价 | |||
TI |
2015+ |
DIP |
19889 |
一级代理原装现货,特价热卖! |
询价 | ||
TI |
24+ |
DIP-16 |
365 |
询价 | |||
TI |
23+ |
CDIP16 |
5000 |
原装正品,假一罚十 |
询价 | ||
TI |
19+ |
CDIP-16 |
2750 |
进口原装正品现货军工器件原厂COC |
询价 | ||
TI |
三年内 |
1983 |
只做原装正品 |
询价 | |||
TI/德州仪器 |
23+ |
CDIP16 |
3230 |
原装正品代理渠道价格优势 |
询价 | ||
Texas Instruments(德州仪器) |
22+ |
NA |
500000 |
万三科技,秉承原装,购芯无忧 |
询价 |
相关芯片丝印
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相关库存
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