CD4027数据手册集成电路（IC）的触发器规格书PDF

描述 Description

The CD4027 is a edge-triggered dual JK flip-flop which features independent set-direct (SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q(—)). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH asynchronous clear-direct (CD) and set-direct (SD) inputs are independent and override the J, K, and CP inputs. The outputs are buffered for best system performance. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.

特性 Features

• Wide supply voltage range from 3V to 15V
• Fully static operation
• 5V, 10V, and 15V parametric ratings
• Standardized symmetrical output characteristics
• Specified from -40℃ to +125℃
• Packaging information: DIP16/SOP16/TSSOP16

应用 Application

• 家用电器
• 工业控制
• 新能源