Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

文件：68.34 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

CMOS NAND Gates

Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I

文件：109.33 Kbytes 页数：9 Pages

INTERSIL

SEMICONDUCTORS

文件：2.43533 Mbytes 页数：31 Pages

ETCList of Unclassifed Manufacturers

未分类制造商

Buffered Triple 3-Input NAND,NOR Gate

文件：127.67 Kbytes 页数：6 Pages

NSC

国半

3路3输入与非门

The CD4023 provides the positive triple 3-input NAND function. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.It operates over a recommended VDD power supply range of 3V to 15V referenced to GND (usually ground). Unused inputs must be connecte • Wide supply voltage range from 3V to 15V\n• Fully static operation\n• 5V, 10V, and 15V parametric ratings\n• Standardized symmetrical output characteristics\n• Inputs and outputs are protected against electrostatic effects\n• Specified from -40℃ to +125℃\n• Packaging information: DIP14/SOP14/TSSOP;

I-CORE

中微爱芯

Buffered Triple 3-Input NAND,NOR Gate

TI

德州仪器

Buffered Triple 3-Input NAND Gate

ONSEMI

安森美半导体

CMOS NAND Gates

Features: Quiescent current specified to 15 V Maximum input leakage of 1 uA at 15 V (full package-temperature range) 1-V noise margin (full package-temperature range)

文件：550.23 Kbytes 页数：10 Pages

TI

德州仪器

CMOS NAND Gates

Description CD4011BMS, CD4012BMS, and CD4023BMS NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. CD4011BMS - Quad 2 Input CD4012BMS - Dual 4 Input CD4023BMS - Triple 3 I

文件：109.33 Kbytes 页数：9 Pages

INTERSIL

Buffered Triple 3-Input NAND Gate

General Description These triple gates are monolithic complementary MOS(CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outp

文件：68.34 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体