丝印：CD4017BM；Package：SOIC；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

文件：1.01958 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4017BM；Package：SOIC；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

文件：1.01958 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4017BM；Package：SOIC；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

文件：1.01958 Mbytes 页数：23 Pages

TI

德州仪器

丝印：CD4017BM；Package：SOIC；CMOS Counter/Dividers

Features: Fully static operation = Medium-speed operation . . 10 MHz (typ) at Vpp = 10 V Standardized, symmetrical output characteristics 100% tested for quiescent current at 20 V 5-V,10V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 134, “St

文件：1.01958 Mbytes 页数：23 Pages

TI

德州仪器

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes 页数：8 Pages

NSC

国半

CMOS COUNTER/DIVIDERS

文件：590.39 Kbytes 页数：14 Pages

TI

德州仪器

Decade Counter/Divider

文件：415.56 Kbytes 页数：10 Pages

TI

德州仪器

CMOS Counter/Dividers

文件：1.03167 Mbytes 页数：19 Pages

TI

德州仪器

CMOS Counter/Dividers

CD4017BMS and CD4022BMS are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fal

文件：623.65 Kbytes 页数：10 Pages

RENESAS

瑞萨

CMOS Counter/Dividers

CD4017BMS and CD4022BMS are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fal

文件：157.83 Kbytes 页数：10 Pages

Intersil