丝印：CD40109BF；Package：CDIP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD40109BF；Package：CDIP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD40109BF3A；Package：CDIP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD40109BF3A；Package：CDIP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

CMOS Quad Low-to-High Voltage Level Shifter

Description CD40109BMS contains four low-to-high voltage level shifting circuits. Each circuit will shift a low voltage digital logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a higher voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS. Th

文件：76.61 Kbytes 页数：9 Pages

INTERSIL

丝印：CD40109B；Package：SOP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD40109B；Package：SOP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CD40109B；Package：SOP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CM0109B；Package：TSSOP；CMOS Quad Low-to-High Voltage Level Shifter

Features: Independence of power supply sequence considerations—V cc can exceed Vp, input signals can exceed both Ve and Vpp Up and down level-shifting capability Three-state outputs with seperate enable controls Standardized, symmetrical output characteristics 100% tested for quiescent

文件：885.65 Kbytes 页数：19 Pages

TI

德州仪器