P-channel enhancement mode vertical D-MOS transistor

DESCRIPTION P-channel vertical D-MOS transistor in a TO-92 variant envelope and intended for use as a line current interruptor in relay, high-speed and line transformer drivers. FEATURES • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown.

文件：76.49 Kbytes 页数：12 Pages

PHI

PHI

P-channel enhancement mode vertical D-MOS transistor

DESCRIPTION P-channel vertical D-MOS transistor in a TO-92 variant envelope and intended for use as a line current interruptor in relay, high-speed and line transformer drivers. FEATURES • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown.

文件：76.49 Kbytes 页数：12 Pages

PHI

PHI

P-channel vertical D-MOS intermediate level FET

Intermediate level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only.

Nexperia

安世

P-channel enhancement mode vertical D-MOS transistor

恩XP