BR25G512FVM-5ATR中文资料罗姆数据手册PDF规格书

General Description

BR25G512xxx-5A Series is a 512 Kbit serial EEPROM of SPI

BUS Interface.

特性 Features

◼ SPI BUS Mode (CPOL, CPHA) = (0, 0), (1, 1)

◼ Page Size: 128 Byte

◼ Bit Format: 65536 x 8 bit

◼ 128 Byte Write Lockable Identification Page (ID Page)

◼ Address Auto Increment Function at Read Operation

◼ Auto Erase and Auto End Function at Data Rewrite

◼ Write Protect Block Setting by Software

Memory Array 1/4, 1/2, Whole

◼ HOLD Function by the HOLDB Pin

◼ Prevention of Write Mistake

Write Prohibition at Power On

Write Prohibition by the WPB Pin

Write Prohibition Block Setting

Prevention of Write Mistake at Low Voltage

◼ Data at Shipment

Memory Array: FFh

ID Page : FFh

Status Register WPEN, BP1, BP0: 0, 0, 0

Lock Status LS: 0

Applications

◼ Ordinary Electronic Equipment (such as AV Equipment,

OA Equipment, Telecommunication Equipment, Home

Electronic Appliances, Amusement Equipment, etc.).