Dual-Channel, 14-Bit, CCD Signal Processor with Precision Timing Core

文件：71.88 Kbytes 页数：2 Pages

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亚德诺

Package：100-LFBGA，CSPBGA；包装：散装 类别：集成电路（IC） 专用 IC 描述：IC CCD SGNL PROC 14BIT 100CSBGA

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亚德诺

Package：100-LFBGA，CSPBGA；包装：托盘 类别：集成电路（IC） 专用 IC 描述：IC CCD SGNL PROC 14BIT 100CSBGA

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亚德诺

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9972 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs as well as an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output configurations.

文件：87.59 Kbytes 页数：9 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9972 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs as well as an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output configurations.

文件：87.59 Kbytes 页数：9 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

3.3V, 125-MHz, Multi-Output Zero Delay Buffer

Description The Z9972 has an integrated PLL that provides low-skew and low-jitter clock outputs for high-performance microprocessors. Three independent banks of four outputs as well as an independent PLL feedback output, FB_OUT, provide exceptional flexibility for possible output configurations.

文件：87.59 Kbytes 页数：9 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司