Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

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亚德诺

包装：盒 功能：时钟发生器 类别：开发板，套件，编程器 评估和演示板及套件 描述：BOARD EVAL FOR AD9551

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亚德诺

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

AD

亚德诺

Multiservice Clock Generator

GENERAL DESCRIPTION The AD9551 accepts one or two reference input signals to synthesize one or two output signals. The AD9551 uses a fractional-N PLL that precisely translates the reference frequency to the desired output frequency. The input receivers and output drivers provide both single-ended

文件：799.08 Kbytes 页数：40 Pages

AD

亚德诺

Programmable Communications Interface

DISTINCTIVE CHARACTERISTICS • Improved performance with Am9551 • Separate control and transmit register input buffers • 8080A/9080A compatible • Synchronous or asynchronous serial data transfer • Parity, overrun and framing errors detected • Half or full duplex signalling • Character length

文件：438.42 Kbytes 页数：7 Pages

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