800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

GENERAL DESCRIPTION The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. FEATURES 1.6 GHz dif

文件：609.57 Kbytes 页数：28 Pages

AD

亚德诺

800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outp

文件：481.09 Kbytes 页数：28 Pages

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亚德诺

800 MHz时钟分配IC，分频器，延迟调整，三路输出

AD9513是一款三路输出时钟分配IC，其低抖动和低相位噪声特性能够实现优质的数据转换器性能。这款器件也适合于对相位噪声和抖动有严格要求的其它应用。\n\n 三路独立的时钟输出可被设置为LVDS或CMOS电平。在LVDS模式下，输出工作在800 MHz；在CMOS模式下，输出工作在250 MHz。\n\n 每路输出都具有可编程的分频器，可设置1~32的整数分频比。一路时钟输出相对于其它时钟输出的相位可通过分频器相位选择功能进行设置，用作时序粗调。\n\n 其中一路输出提供延迟单元，具有3个可选择的满量程延迟值（1.5 ns、5 ns及10 ns），均可提供16级精 • 1.6 GHz差分时钟输入\n\n• 3个可编程分频器\n\n• 编程范围：1至32\n\n• 用于延迟粗调的相位选择\n\n• 节省空间的32引脚LFCSP封装;

ADI

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800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

GENERAL DESCRIPTION The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. FEATURES 1.6 GHz dif

文件：609.57 Kbytes 页数：28 Pages

AD

亚德诺

800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

GENERAL DESCRIPTION The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. FEATURES 1.6 GHz dif

文件：609.57 Kbytes 页数：28 Pages

AD

亚德诺

800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

GENERAL DESCRIPTION The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. FEATURES 1.6 GHz dif

文件：609.57 Kbytes 页数：28 Pages

AD

亚德诺

800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

GENERAL DESCRIPTION The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. FEATURES 1.6 GHz dif

文件：609.57 Kbytes 页数：28 Pages

AD

亚德诺

800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

GENERAL DESCRIPTION The AD9513 features a three-output clock distribution IC in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this part. FEATURES 1.6 GHz dif

文件：609.57 Kbytes 页数：28 Pages

AD

亚德诺

800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

文件：610.35 Kbytes 页数：28 Pages

AD

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800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outp

文件：481.09 Kbytes 页数：28 Pages

AD

亚德诺