1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

文件：1.19355 Mbytes 页数：60 Pages

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1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

文件：1.19355 Mbytes 页数：60 Pages

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Package：48-VFQFN 裸露焊盘，CSP；包装：管件 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 2:5 1.2GHZ 48LFCSP

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Package：48-VFQFN 裸露焊盘，CSP；包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 2:5 1.2GHZ 48LFCSP

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