1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

文件：1.19355 Mbytes 页数：60 Pages

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亚德诺

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

文件：1.19355 Mbytes 页数：60 Pages

AD

亚德诺

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

文件：1.19355 Mbytes 页数：60 Pages

AD

亚德诺

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

文件：1.19355 Mbytes 页数：60 Pages

AD

亚德诺