MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

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MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

文件：122.88 Kbytes 页数：3 Pages

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MxFE™ 四通道 16 位 12GSPS RFDAC 和四通道 12 位 4GSPS RFADC

AD9081 混合信号前端（MxFE®）是一款高度集成的套件，具有四个 16 位、12 GSPS 最大采样率、RF 数模转换器（DAC）内核，以及四个 12 位、4 GSPS 速率、RF 模数转换器（ADC）内核。AD9081 非常适合需要宽带 ADC 和 DAC 来处理具有宽瞬时带宽信号的应用。该套件具有八个发送和八个接收通道，支持 24.75 Gbps/通道 JESD204C 或 15.5 Gbps/通道 JESD204B 标准。该套件还具有片内时钟乘法器，以及直接针对 RF 应用的宽带或多频带数字信号处理（DSP）功能。可以绕过 DSP 数据路径，以允许转换器内核与 JESD204 数据 • 灵活的可重新配置通用平台设计\n\n• 4 个DAC 和 4 个ADC（4D4A）\n\n• 支持单频段、双频段和多频段\n\n• 数据路径和 DSP 模块可完全绕过\n\n• 1、2、3 和 4 的 DAC 与 ADC 采样率之比\n\n• 具有多芯片同步功能的片内 PLL\n\n• 片外 PLL 的外部 RFCLK 输入选项\n\n\n\n\n\n• 最大 DAC 采样率高达 12 GSPS\n\n• 使用 JESD204C 的最大数据速率高达 12 GSPS\n\n• 可用的模拟带宽高达 8 GHz\n\n\n\n• 最大 ADC 采样率高达 4 GSPS\n\n• 使用 JESD2;

ADI

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MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

AD

亚德诺

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

AD

亚德诺

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

AD

亚德诺

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

AD

亚德诺

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

AD

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Quad, 16-Bit, 12 GSPS RF DAC with Wideband Channelizers

FEATURES ► Flexible, reconfigurable common platform design ► 4 DAC cores connected to various DSP and bypass datapaths ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► On-chip PLL with multichip synchronization ► External RFCLK input option for off-chi

文件：2.12554 Mbytes 页数：25 Pages

AD

亚德诺

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Quad, 12-Bit, 4 GSPS RF ADC

FEATURES ► Flexible, reconfigurable common platform design ► 4 DACs and 4 ADCs (4D4A) ► Supports single, dual, and quad band ► Datapaths and DSP blocks are fully bypassable ► DAC to ADC sample rate ratios of 1, 2, 3, and 4 ► On-chip PLL with multichip synchronization ► External RFCLK input

文件：4.87016 Mbytes 页数：45 Pages

AD

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