丝印：ACT11240；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm

文件：210.92 Kbytes 页数：8 Pages

TI

德州仪器

丝印：ACT11240；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm

文件：210.92 Kbytes 页数：8 Pages

TI

德州仪器

丝印：ACT11244；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

文件：404.83 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ACT11244；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

文件：404.83 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ACT11244；Package：SOIC；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA

文件：404.83 Kbytes 页数：14 Pages

TI

德州仪器

丝印：ACT11245；Package：SOIC；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at

文件：893.33 Kbytes 页数：24 Pages

TI

德州仪器

丝印：ACT11245；Package：SOIC；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at

文件：893.33 Kbytes 页数：24 Pages

TI

德州仪器

丝印：ACT11245；Package：SOIC；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at

文件：893.33 Kbytes 页数：24 Pages

TI

德州仪器

丝印：ACT11245；Package：SOP；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at

文件：893.33 Kbytes 页数：24 Pages

TI

德州仪器

丝印：ACT11245；Package：SOP；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at

文件：893.33 Kbytes 页数：24 Pages

TI

德州仪器