丝印：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AC11244；Package：SOIC；OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

EPICE (Enhanced-Performance Implanted CMOS ) 1-mm Process 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 12

文件：412.15 Kbytes 页数：15 Pages

TI

德州仪器

丝印：AC11245；Package：SOIC；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plas

文件：629.36 Kbytes 页数：17 Pages

TI

德州仪器

丝印：AC11257；Package：SOIC；QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS

3-State Outputs Interface Directly With System Bus Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at 125°C Provides Bus Interface From Multiple Sources in High-Performance Systems

文件：723.01 Kbytes 页数：16 Pages

TI

德州仪器

丝印：AC109M；Package：SOIC；CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchup

文件：1.09024 Mbytes 页数：22 Pages

TI

德州仪器

丝印：AC109M；Package：SOIC；CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchup

文件：1.09024 Mbytes 页数：22 Pages

TI

德州仪器

丝印：AC10M；Package：SOIC；TRIPLE 3-INPUT POSITIVE-NAND GATES

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Pro

文件：473.88 Kbytes 页数：14 Pages

TI

德州仪器

丝印：AC10M；Package：SOIC；TRIPLE 3-INPUT POSITIVE-NAND GATES

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Pro

文件：473.88 Kbytes 页数：14 Pages

TI

德州仪器

丝印：AC10M；Package：SOIC；TRIPLE 3-INPUT POSITIVE-NAND GATES

AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Pro

文件：473.88 Kbytes 页数：14 Pages

TI

德州仪器