16M(1M x 16bit) Normal mode & Page mode with Deep Power Down Static Random Access Memory

DESCRIPTION The A64S06162A is a 16Mb high speed, low power Static Random Access Memory(SRAM) organized as 1,048,576 words by 16 bits and supports Deep Power Down and Page Mode. The A64S06162A is a Pseudo SRAM based on successfully proven DRAM CELL SRAM which was specifically developed for cost se

文件：200.61 Kbytes 页数：14 Pages

AMICC

联笙电子

16M(1M x 16bit) Normal mode & Page mode with Deep Power Down Static Random Access Memory

DESCRIPTION The A64S06162A is a 16Mb high speed, low power Static Random Access Memory(SRAM) organized as 1,048,576 words by 16 bits and supports Deep Power Down and Page Mode. The A64S06162A is a Pseudo SRAM based on successfully proven DRAM CELL SRAM which was specifically developed for cost se

文件：200.61 Kbytes 页数：14 Pages

AMICC

联笙电子

16M(1M x 16bit) Normal mode & Page mode with Deep Power Down Static Random Access Memory

DESCRIPTION The A64S06162A is a 16Mb high speed, low power Static Random Access Memory(SRAM) organized as 1,048,576 words by 16 bits and supports Deep Power Down and Page Mode. The A64S06162A is a Pseudo SRAM based on successfully proven DRAM CELL SRAM which was specifically developed for cost se

文件：200.61 Kbytes 页数：14 Pages

AMICC

联笙电子

1M X 16 Bit Low Voltage Super RAM

General Description The A64S0616 is a low operating current 16,777,216-bit Super RAM organized as 1,048,576 words by 16 bits and operates on low power supply voltage from 2.7V to 3.1V. It is built using AMIC’s high performance CMOS DRAM process. Using hidden refresh technique, the A64S0616 provi

文件：171.57 Kbytes 页数：15 Pages

AMICC

联笙电子

1M X 16 Bit Low Voltage Super RAM

General Description The A64S0616 is a low operating current 16,777,216-bit Super RAM organized as 1,048,576 words by 16 bits and operates on low power supply voltage from 2.7V to 3.1V. It is built using AMIC’s high performance CMOS DRAM process. Using hidden refresh technique, the A64S0616 provi

文件：171.57 Kbytes 页数：15 Pages

AMICC

联笙电子

2M X 16 Bit Low Voltage Super RAM

Description A64S16161 is a virtually static RAM, which uses DRAM type memory cells, but it has refresh transparency, so that you need not to imply refresh operation. Furthermore the interface is completely compatible to a low power Asynchronous type SRAM, you can operate as same as the Asynchrono

文件：235.18 Kbytes 页数：16 Pages

AMICC

联笙电子

1M X 16 Bit Low Voltage Super RAM

General Description The A64S0616 is a low operating current 16,777,216-bit Super RAM organized as 1,048,576 words by 16 bits and operates on low power supply voltage from 2.7V to 3.1V. It is built using AMIC’s high performance CMOS DRAM process. Using hidden refresh technique, the A64S0616 provi

文件：171.57 Kbytes 页数：15 Pages

AMICC

联笙电子

1M X 16 Bit Low Voltage Super RAM

General Description The A64S0616 is a low operating current 16,777,216-bit Super RAM organized as 1,048,576 words by 16 bits and operates on low power supply voltage from 2.7V to 3.1V. It is built using AMIC’s high performance CMOS DRAM process. Using hidden refresh technique, the A64S0616 provi

文件：171.57 Kbytes 页数：15 Pages

AMICC

联笙电子

16M(1M x 16bit) Normal mode & Page mode Static Random Access Memory

DESCRIPTION\nThe A64S06161A is a 16Mb high speed, low power Static Random Access Memory(SRAM) organized as 1,048,576 words by 16 bits and supports Page Mode.\nThe A64S06161A is a Pseudo SRAM based on successfully proven DRAM CELL SRAM which was specifically developed for cost sensitive, low power co • Standard Asynchronous SRAM Interface and Page Mode\n• Organization : 1M x 16Bit\n• Power Supply Voltage : 2.7 ~ 3.3 V\n• Page Size : 4 words\n• Page Mode Access (tPAA) : 35ns\n• Data Retention Voltage : 2.4V\n• Tri-state Output and TTL Compatible;

AMIC

联笙电子

16M(1M x 16bit) Normal mode & Page mode with Deep Power Down Static Random Access Memory

DESCRIPTION\nThe A64S06162A is a 16Mb high speed, low power Static Random Access Memory(SRAM) organized as 1,048,576 words by 16 bits and supports Deep Power Down and Page Mode. The A64S06162A is a Pseudo SRAM based on successfully proven DRAM CELL SRAM which was specifically developed for cost sens • Standard Asynchronous SRAM Interface with Deep Power Down and Page Mode\n• Organization : 1M x 16Bit\n• Power Supply Voltage : 2.7 ~ 3.3 V\n• Page Size : 4 words\n• Page Mode Access (tPAA) : 35ns\n• Data Retention Voltage : 2.4V\n• Deep Power Down : 5uA\n• Tri-state Output and TTL Compatible;

AMIC

联笙电子