2:12,3.3V,2.5V LVPECL Fanout Buffer

The 8SLVP1212I is a high-performance, 12 output differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1212I is characterized to operate from a 3.3V and 2.5V power supply. Guaranteed output-to-output Twelve low skew, low additive jitter LVPECL outputs\nTwo selectable, differential clock inputs\nDifferential pairs can accept the following differential input levels: LVDS, LVPECL, CML\nMaximum input clock frequency: 2GHz\nLVCMOS interface levels for the control input (input select)\nOutput skew: 15;

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Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer

文件：881.73 Kbytes 页数：25 Pages

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Maximum input clock frequency

文件：881.73 Kbytes 页数：25 Pages

IDT

Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer

文件：881.73 Kbytes 页数：25 Pages

IDT