Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

Description The device is intended to take 1 or 2 reference clocks, select between them, using a pin or register selection and generate up to 8 outputs that may be the same as the reference frequency or integer-divider versions of it. The 8P79818 supports two output banks, each with its own d

文件：1.18054 Mbytes 页数：34 Pages

RENESAS

瑞萨

Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

文件：869.64 Kbytes 页数：34 Pages

IDT

Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

文件：869.64 Kbytes 页数：34 Pages

IDT

Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

Description The device is intended to take 1 or 2 reference clocks, select between them, using a pin or register selection and generate up to 8 outputs that may be the same as the reference frequency or integer-divider versions of it. The 8P79818 supports two output banks, each with its own d

文件：1.18054 Mbytes 页数：34 Pages

RENESAS

瑞萨

Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

文件：869.64 Kbytes 页数：34 Pages

IDT

Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

文件：869.64 Kbytes 页数：34 Pages

IDT