丝印：ICS854S006AIL；Low Skew, 1-to-6, Differential-to-LVDS Fanout Buffer

Features ▪ Six differential LVDS outputs ▪ One differential clock input pair ▪ CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL ▪ Maximum output frequency: 1.7GHz ▪ Translates any single-ended input signal to LVDS levels with resistor bias

文件：1.09572 Mbytes 页数：18 Pages

RENESAS

瑞萨

Low Skew, 1-to-6, Differential-to - LVDS Fanout Buffer One differential clock input pair

文件：205.66 Kbytes 页数：15 Pages

IDT

Low Skew, 1-to-6, Differential-to- LVDS Fanout Buffer

文件：272.86 Kbytes 页数：15 Pages

IDT

Low Skew, 1-to-6, Differential-to- LVDS Fanout Buffer

文件：205.66 Kbytes 页数：15 Pages

IDT

Low Skew, 1-to-6, Differential-to-LVDS Fanout Buffer

文件：691.85 Kbytes 页数：17 Pages

IDT

Package：24-TSSOP（0.173"，4.40mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：IC CLK BUFFER 1:6 1.7GHZ 24TSSOP

Renesas Electronics America Inc