丝印：4S054AIL；Package：TSSOP；4:1 Differential-to-LVDS Clock Multiplexer

Features • High speed 4:1 differential multiplexer • One differential LVDS output pair • Four selectable differential PCLK, nPCLK input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 2.5GHz • Translates any singl

文件：1.56534 Mbytes 页数：15 Pages

RENESAS

瑞萨

丝印：4S054AIL；Package：TSSOP；4:1 Differential-to-LVDS Clock Multiplexer

Features • High speed 4:1 differential multiplexer • One differential LVDS output pair • Four selectable differential PCLK, nPCLK input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 2.5GHz • Translates any singl

文件：1.56534 Mbytes 页数：15 Pages

RENESAS

瑞萨

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：托盘 类别：集成电路（IC） 时钟缓冲器，驱动器 描述：NETWORK TIMING

Renesas Electronics America Inc

4:1 Differential-to-LVDS Clock Multiplexer

Features • High speed 4:1 differential multiplexer • One differential LVDS output pair • Four selectable differential PCLK, nPCLK input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 2.5GHz • Translates any singl

文件：1.56534 Mbytes 页数：15 Pages

RENESAS

瑞萨

One differential LVDS output pair

文件：1.3618 Mbytes 页数：14 Pages

IDT