SYNCHRONOUS ETHERNET WAN PLL

DESCRIPTION The IDT82V3385 is an integrated, single-chip solution for the Synchronous Equipment Timing Source for Stratum 2, 3E, 3, SMC, 4E and 4 clocks in SONET / SDH equipments, DWDM and Wireless base station, such as GSM, 3G, DSL concentrator, Router and Access Network applications. The devic

文件：1.46633 Mbytes 页数：150 Pages

IDT

SYNCHRONOUS ETHERNET WAN PLL

FEATURES HIGHLIGHTS • The first single PLL chip: • Features 0.5 mHz to 560 Hz bandwidth • Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet • Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-16/ Option I) jitter generation requirements • Provides node clocks for Cellular and

文件：1.14029 Mbytes 页数：146 Pages

RENESAS

瑞萨

SYNCHRONOUS ETHERNET WAN PLL

FEATURES HIGHLIGHTS • The first single PLL chip: • Features 0.5 mHz to 560 Hz bandwidth • Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet • Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-16/ Option I) jitter generation requirements • Provides node clocks for Cellular and

文件：1.14029 Mbytes 页数：146 Pages

RENESAS

瑞萨

SYNCHRONOUS ETHERNET IDT WAN PLL™

FEATURES HIGHLIGHTS • The first single PLL chip: • Features 0.5 mHz to 560 Hz bandwidth • Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet • Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-16/ Option I) jitter generation requirements • Provides node clocks for Cellular and

文件：2.0871 Mbytes 页数：178 Pages

RENESAS

瑞萨

SYNCHRONOUS ETHERNET WAN PLL

DESCRIPTION The IDT82V3385 is an integrated, single-chip solution for the Synchronous Equipment Timing Source for Stratum 2, 3E, 3, SMC, 4E and 4 clocks in SONET / SDH equipments, DWDM and Wireless base station, such as GSM, 3G, DSL concentrator, Router and Access Network applications. The devic

文件：1.46633 Mbytes 页数：150 Pages

IDT

SYNCHRONOUS ETHERNET IDT WAN PLL™

FEATURES HIGHLIGHTS • The first single PLL chip: • Features 0.5 MHz to 560 Hz bandwidth • Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet • Exceeds GR-253-CORE (OC-12) and ITU-T G.813 (STM-16/ Option I) jitter generation requirements • Provides node clocks for Cellular and

文件：2.3008 Mbytes 页数：157 Pages

RENESAS

瑞萨

SYNCHRONOUS ETHERNET IDT WAN PLL™

FEATURES HIGHLIGHTS • Single PLL chip: • Features 0.5 mHz to 560 Hz bandwidth • Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet (SyncE) • Exceeds GR-253-CORE and ITU-T G.813 jitter generation requirements • Provides node clocks for Cellular and WLL base-station (GSM and 3

文件：1.53042 Mbytes 页数：182 Pages

RENESAS

瑞萨

SYNCHRONOUS ETHERNET IDT WAN PLL™

FEATURES HIGHLIGHTS • Single PLL chip: • Features 0.5 mHz to 560 Hz bandwidth • Provides node clock for ITU-T G.8261/G.8262 Synchronous Ethernet (SyncE) • Exceeds GR-253-CORE and ITU-T G.813 jitter generation requirements • Provides node clocks for Cellular and WLL base-station (GSM and 3

文件：1.53042 Mbytes 页数：182 Pages

RENESAS

瑞萨

WAN PLL WITH SINGLE REFERENCE INPUT

文件：375.4 Kbytes 页数：27 Pages

IDT

WAN PLL WITH SINGLE REFERENCE INPUT

文件：149.02 Kbytes 页数：28 Pages

IDT