74VCX32500GX数据手册集成电路（IC）的通用总线功能规格书PDF

描述 Description

General Description
The VCX32500 is an 36-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data-flow in transparent, latched, and clocked modes.

特性 Features

■ 1.4V to 3.6V VCC supply operation
■ 3.6V tolerant inputs and outputs
■ tPD (A to B, B to A)
   2.9 ns max for 3.0V to 3.6V VCC
■ Power-down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ Static Drive (IOH/IOL)
  ±24 mA @ 3.0V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latchup performance exceeds 300 mA
■ ESD performance:
   Human body model 2000V
   Machine model 200V
■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)

简介

74VCX32500GX属于集成电路（IC）的通用总线功能。由制造生产的74VCX32500GX通用总线功能通用总线功能系列产品是元件级产品，用于处理或操作一系列（通常为 8 个或更多）并行逻辑信号（称为总线）。所执行的功能包括临时存储要发送或接收的数据，执行缓冲以允许输出电流容量有限的器件（例如微处理器）通过远距离互连高速传输数据，以及调换或移动总线内的位顺序等。