74V2G132CTR中文资料意法半导体数据手册PDF规格书

DESCRIPTION

The 74V2G132 is an advanced high-speed CMOS SINGLE 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.

Pin configuration and function are the same as those of the 74V2G00 but the 74V2G132 has hysteresis.

The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 3.0ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C

■ TYPICAL HYSTERESIS:

VH = 800mV at VCC = 4.5V

VH = 500mV at VCC = 3.0V

■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8mA (MIN) at VCC = 4.5V

IIOH| = IOL = 4mA (MIN) at VCC = 3.0V

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ IMPROVED LATCH-UP IMMUNITY