74V2G07CTR中文资料意法半导体数据手册PDF规格书

DESCRIPTION

The 74V2G07 is an advanced high-speed CMOS TRIPLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.

Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD =3.7ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUT

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ IMPROVED LATCH-UP IMMUNITY