74V2G07STR集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

74V2G07STR属于集成电路（IC）的缓冲器驱动器接收器收发器。由意法半导体集团制造生产的74V2G07STR缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。

DESCRIPTION

The 74V2G07 is an advanced high-speed CMOS TRIPLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.

Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD =3.7ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C

■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.)

■ POWER DOWN PROTECTION ON INPUT

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V

■ IMPROVED LATCH-UP IMMUNITY