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74LVCH16374ADGG-Q100数据手册Nexperia中文资料规格书
74LVCH16374ADGG-Q100规格书详情
描述 Description
The 74LVC16374A-Q100 and 74LVCH16374A-Q100 are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A-Q100 only) for each flip-flop and 3-state outputs for bus-oriented applications. It consists of two sections of eight positive edge-triggered flip-flops. A clock input (nCP) and an output enable (nOE) are provided for each octal. The flip-flops store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition.
The flip-flops store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition.
When pin nOE is LOW, the contents of the flip-flops are available at the outputs. When pin nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input nOE does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
特性 Features
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Multibyte flow-through standard pinout architecture
• Low inductance multiple supply pins for minimum noise and ground bounce
• Direct interface with TTL levels
• All data inputs have bus hold (74LVCH16374A-Q100 only)
• High-impedance outputs when VCC = 0 V
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• MIL-STD-883, method 3015 exceeds 2000 V
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
技术参数
- 制造商编号
:74LVCH16374ADGG-Q100
- 生产厂家
:Nexperia
- VCC (V)
:1.2 - 3.6
- Logic switching levels
:CMOS/LVTTL
- Output drive capability (mA)
:± 24
- tpd (ns)
:3.8
- fmax (MHz)
:150
- Power dissipation considerations
:low
- Tamb (°C)
:-40~125
- Rth(j-a) (K/W)
:82
- Ψth(j-top) (K/W)
:2.0
- Rth(j-c) (K/W)
:37
- Package name
:TSSOP48
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
恩XP |
22+ |
48TFSOP 60UFQFN |
9000 |
原厂渠道,现货配单 |
询价 | ||
恩XP |
24+ |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
询价 | |||
Nexperia/安世 |
22+ |
SOT370 |
15810 |
原厂原装正品现货 |
询价 | ||
恩XP |
24+ |
2886 |
原装现货,免费供样,技术支持,原厂对接 |
询价 | |||
PHI |
23+ |
SSOP |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
询价 | ||
24+ |
N/A |
56000 |
一级代理-主营优势-实惠价格-不悔选择 |
询价 | |||
NEXPERIA/安世 |
2447 |
SOT362-1 |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
询价 | ||
PHI |
23+ |
TSSOP48 |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
TI |
2025+ |
TSSOP-48 |
16000 |
原装优势绝对有货 |
询价 | ||
Rochester |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
询价 |