74LVC2G241DP集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

厂商型号	74LVC2G241DP
参数属性	74LVC2G241DP 封装/外壳为8-TSSOP，8-MSOP（0.118"，3.00mm 宽）；包装为卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带；类别为集成电路（IC）的缓冲器驱动器接收器收发器；产品描述：IC BUF NON-INVERT 5.5V 8TSSOP
功能描述	Dual buffer/line driver; 3-state
丝印标识	V41
封装外壳	SOT505-2 / 8-TSSOP，8-MSOP（0.118"，3.00mm 宽）
文件大小	274.15 Kbytes
页面数量	18 页
生产厂商	NEXPERIA
中文名称	安世
网址	网址
数据手册	下载地址一下载地址二到原厂下载
更新时间	2025-11-16 11:00:00
人工找货	74LVC2G241DP价格和库存，欢迎联系客服免费人工找货

1. General description

The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs

are controlled by the output enable inputs 1OE and 2OE:

• A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state.

• A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall

times.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the

74LVC2G241 as a translator in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry

disables the output, preventing a damaging backflow current through the device when it is powered

down.

2. Features and benefits

• Wide supply voltage range from 1.65 V to 5.5 V

• 5 V tolerant input/output for interfacing with 5 V logic

• High noise immunity

• Complies with JEDEC standard:

• • JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8-B/JESD36 (2.7 V to 3.6 V)

• ESD protection:

• • HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• ±24 mA output drive (VCC = 3.0 V)

• CMOS low power consumption

• Latch-up performance exceeds 250 mA

• Direct interface with TTL levels

• Inputs accept voltages up to 5 V

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C